Skip to content

VLSI Design & Technology important questionsMost repeated in SPPU papers

These 22 questions appeared in more than one SPPU VLSI Design & Technology paper we have: 11 papers, from Oct 2022 to Nov 2025. The most-asked come first. Each one links to the papers it was asked in.

All VLSI Design & Technology papers and notes

Repeated questions

Endsem questions (15)

  1. 6×asked

    What is DRC? Explain in detail rules in CMOS VLSI design?

    Nov 2025 ·May 2025 ·Nov 2024 ·May 2024 ·Nov 2023 ·Nov 2022

  2. 5×asked

    Draw and explain PLD design flow.

    Nov 2025 ·May 2025 ·May 2024 ·Nov 2023 ·Sep 2023

  3. 4×asked

    What is the need of BIST? Explain typical BIST in detail.

    Nov 2025 ·May 2025 ·Nov 2024 ·May 2024

  4. 3×asked

    Draw and explain CMOS Inverter schematic and it's voltage transfer characteristics.

    Nov 2025 ·May 2025 ·Nov 2023

  5. 3×asked

    Draw stick diagram for Inverter, NAND and NOR gate.

    Nov 2025 ·May 2024 ·Nov 2023

  6. 3×asked

    Explain the need for Design for Testability? Explain stuck-at-0 and stuck- at-1 faults with example.

    Nov 2025 ·May 2024 ·May 2023

  7. 3×asked

    Explain ASIC Design flow.

    May 2025 ·Nov 2024 ·May 2023

  8. 3×asked

    Write SPICE code for CMOS invertor for AC analysis. 2

    May 2025 ·Nov 2024 ·Nov 2023

  9. 3×asked

    Draw CMOS logic for Y=AB + C (D+E). Calculate W/L ratio for NMOS and PMOS as well as area needed on the chip. 2

    Nov 2024 ·Nov 2023 ·May 2023

  10. 2×asked

    What are the merits of Transmission gate? Design 2:1 multiplexer using transmission gate.

    Nov 2025 ·May 2024

  11. 2×asked

    Write short note on i) JTAG ii) Boundary scan

    Nov 2025 ·May 2024

  12. 2×asked

    Explain the following terms with respect to testability: i) Fault coverage ii) Fault Models iii) Observability iv) Controllability v) Physical Defects

    May 2025 ·Nov 2024

  13. 2×asked

    What is technology scaling? Explain any one type of scaling with its effect at least 4 parameters.

    May 2025 ·Nov 2022

  14. 2×asked

    Discuss need for transmission gate. Draw 4:1 Mux using TG.

    Nov 2024 ·May 2023

  15. 2×asked

    Explain synthesis and simulation tools in brief.

    Nov 2023 ·Nov 2022

Insem questions (7)

  1. 4×asked

    Write VHDL code for 4:1 Mux using behavioral modeling style. Also write it test bench code.

    Aug 2025 ·Sep 2024 ·Sep 2023 ·Oct 2022

  2. 3×asked

    What is meant by concurrent and sequential statements in VHDL? Describe with examples.

    Aug 2025 ·Sep 2024 ·Oct 2022

  3. 2×asked

    What are different signal integrity issues? How to minimize it. 

    Aug 2025 ·Sep 2023

  4. 2×asked

    What is Clock Skew? What are techniques to minimize it?

    Aug 2025 ·Oct 2022

  5. 2×asked

    Write VHDL Code and its test bench of full adder.

    Aug 2025 ·Oct 2022

  6. 2×asked

    Draw state diagram and write VHDL code and its test bench for sequence detector 111.

    Sep 2024 ·Oct 2022

  7. 2×asked

    Explain different modeling styles in VHDL.

    Sep 2023 ·Oct 2022

Questions count as repeated when their wording matches closely across papers. Numericals that depend on a figure are left out, since the figure changes from paper to paper.