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InsemOct 20242019 patternSE Electrical

Analog and Digital Electronics (ADE) SPPU Insem Question Paper Oct 2024

All 4 questions from this SPPU insem paper, as printed. Read them here or open the PDF.

Subject code
203143
Pattern
2019 pattern
Exam
Insem
Session
Oct 2024
Max. marks
30
Time
1 Hour
Semester
III
Paper code
[6359]-508

Printed for: S.E. (Electrical) (Insem)

Instructions to the candidates

  1. Answer Q1 or Q2, Q3 or Q4.
  2. Neat diagrams must be drawn wherever necessary.
  3. Figures to the right indicate full marks.
  4. Assume suitable data, if necessary.

Questions

  1. Q1

    1. a)

      What is SOP form of reduction? Give one example of it with K map.

      [5]
    2. b)

      Draw logical diagram of 2:4 decoder. Explain its working with truth table.

      [5]
    3. c)

      This part has equations that don’t show as text. Open the PDF to read it.

      [5]
  2. Q2

    1. a)

      What is POS form of reduction? Give one example of it with K map.

      [5]
    2. b)

      State at list four Boolean laws. Prove any one of them.

      [5]
    3. c)

      With the help of truth table explain the working of 3 bit Full Adder.

      [5]
  3. Q3

    1. a)

      Give comparison between Combinational Logic Circuit and Sequential Logic Circuit. (Minimum 5 points).

      [5]
    2. b)

      Design MOD 04 Asynchronous UP Counter. Also draw timing diagram for the same.

      Also asked:Oct 2023

      [5]
    3. c)

      With the help of neat diagram explain the working of 3 bit Ring Counter. Draw its timing diagram.

      [5]
  4. Q4

    1. a)

      Give comparison between Synchronous Counter and Asynchronous Counter. (Minimum 5 points).

      [5]
    2. b)

      What is modulus of counter? Draw neat diagram of MOD 08 Synchronous UP counter with its timing diagram.

      [5]
    3. c)

      With the help of neat diagram explain the working of 3 bit Twisted Ring Counter. Draw its timing diagram. 

      [5]