Analog and Digital Electronics (ADE) SPPU Endsem Question Paper May 2024
All 8 questions from this SPPU endsem paper, as printed. Read them here or open the PDF.
- Subject code
- 203143
- Pattern
- 2019 pattern
- Exam
- Endsem
- Session
- May 2024
- Max. marks
- 70
- Time
- 2½ Hours
- Semester
- III
- Paper code
- [6261]-18
Printed for: S.E. (Electrical Engineering)
Instructions to the candidates
- Solve Q.1 or Q.2, Q.3 or Q.4, Q.5 or Q.6, Q.7 or Q.8.
- Neat diagrams must be drawn wherever necessary.
- Figures to the right indicate full marks.
- Assume Suitable additional data if necessary.
- Use of non-programmable calculator is allowed.
Questions
Q1
- a)[4]
Mention the advantages of PLD’s.
- b)[6]
Differentiate between RAM and ROM.
- c)[8]
With neat diagram explain PAL. Mention its advantages and disadvantages.
OR- a)
Q2
- a)[4]
Write a short note on semiconductor memories.
- b)[6]
What is CPLD? Mention the features of CPLD.
- c)[8]
With neat diagram explain the detail architecture of FPGA.
- a)
Q3
ORQ4
- a)[3]
Mention the applications of instrumentation amplifier.
- b)[6]
- c)[8]
Explain generation of sine waveform using OPAMP. Draw the required waveforms.
- a)
Q5
ORQ6
- a)[4]
Draw the block diagram of regulated power supply.
- b)[6]
Explain the internal structure of IC 555 with proper diagram.
- c)[8]
With neat diagrams analyze first order low pass filter using Op-Amp.
- a)
Q7
- a)[3]
Compare HWR and FWR circuits.
- b)[6]
Explain the working of single-phase full wave centre tapped diode rectifier with pure resistive load.
- c)[8]
With the help of circuit diagram and relevent waveforms, explain the operation of a 3-phase diode bridge rectifier with resistive load.
OR- a)
Q8
- a)[3]
Define following terms. i) Form factor ii) Ripple factor iii) TUF
Also asked:Nov 2023
- b)[6]
With relevant diagrams explain half wave diode rectifier with RL load.
- c)[8]
Explain the working of single-phase full wave diode bridge rectifier with pure resistive load.
- a)